Department of Microelectronic Systems

Research

Research at the Department of Microelectronic Systems are focused on:

- Modeling, design, optimization and practical realization of semiconductor devices.

- Modeling, design, optimization and practical realization of analog and digital integrated CMOS circuits.

- Hardware implementation of image processing algorithms.

- Design and hardware implementation of integrated sensor networks in FPGA and ASICs.

- Artificial intelligence, evolutionary algorithms.

- Hardware and software realization of cryptographic algorithms.

- Techniques of electromagnetic shields in security systems.

- Fuzzy logic systems for the design of VLSI circuits.

 

The following projects have been realized:

· Methods of modeling, design and optimization of electronic circuits for ASIC.

· Theory and design procedures of monolithic Gm-C filters and RC continuous-time active filters.

· Analysis and optimization of nonlinear distortions and noise in continuous-time OTA-C filters.

· Theory and application of semiconductor devices and properties of materials used in electronics

· Methods of analysis and design of analog and digital integrated circuits.

· Modeling of field effect MOS transistors and novel usage of field effect in semiconductors.

· Experimental verification of single-section constant current model of field effect transistor.

· Methods of modeling, design and optimization of laser trimmed film resistors and resistive structures of distributed model.

· Application of FPGA circuits in cryptography.

· Parametric identification of farmakinetic system models. Optimization of excitations for parametric identification purposes.

 

Grants from Polish Ministry of Science and Higher Education (MNiSzW) and Polish State Scientific Research Committee (KBN):

  • Grant KBN No. R0201401: "Design and realization of integrated modules of sensor network in FPGA and ASIC technology for urban environment and traffic monitoring", years 2006 – 2009.
  • Grant No. 4230/B/T02/2008/34 MNiSzW: "Design and realization of specialized CMOS analog processor for real-time image processing", years 2008-2010.
  • Grant badawczy MNiSzW Nr 3 T11B 066 30: "Manufacture and carrying out theorethical and experimental researches on a novel structure of magnetic field sensor", years: 2006 – 2008.
  • Grant KBN No. 4 T11B 016 25: "Design methods and circuit realizations of continuous-time programmable analog CMOS filters for multi-system integrated receivers for wireless communication", years 2003-2005.
  • Grant KBN No. 4 T11B 019 24: " Novel simulation techniques for switched power converting systems", years 2003 – 2006.
  • Grant KBN No. 3 T11B 082 26: "Design of low voltage analog CMOS filters with signal compression", years: 2004-2006.
  • Grant KBN No. 7 T11B 004 20: "Programmable, mixed analog-digital circuits in current mode", years 2001-2003.
  • Grant KBN No. 7 T11B 048 20: "Application of division methods and task queuing for power reduction in CMOS circuits", years 2001- 2002.
  • Grant KBN No. 8T11B 037 16: "Design and circuit realization of CMOS and BiCMOS analog blocks for functional path of cellular phone receiver", years 1999 –2002.
  • Grant no. 8S50102407, "Design methods and circuit realization of analog integrated CMOS ASIC filters with automatic compensation of parameters" - years 1994-1996.
  • Grant no. 8T11B01114, "Methods of design and realization of integrated analog CMOS and BiCMOS circuits in programmable structures", years 1998-1999.
  • Grant no. 801059101, "Synthesis and design of digital circuits, filtering circuits and quasi-neural MOS with artificial intelligence methods", years: 1992-1994.

Additional projects:
  • Agreement with Intel Technology Poland, No. ITP-WETI-ASIC-R-2003-Q3: "Coprocesor CMOS ASIC".
  • Agreement No. 015459 with Intel Technology Poland, No. ITP-TUG-2001/2002-2, "Quality of Service (QoS) Hardware Building Block: FPGA Implementation".
  • Agreement with Chonbuk National University, Electrical & Electronics Circuits and Systems Research Institute, South Korea Development of Analog Integrated Circuits for Low-Voltage & Low-Power". Protocol The Third Session of Polish-Korean Joint Committee on Scientific and Technological Cooperation, July 27, 2001, Warsaw. (Programme of S&T Cooperation for the years 2001-2003).